Lenovo Purley Platform OEM Extended SEL Log Description
1. POST ERROR LOG WITH LENOVO EXTENDED SEL EVENT FORMATS
This section describes the SEL formats of different Lenovo Extended SEL events. SEL viewer utility development teams can use this document.
1.1 QPI RC ERRORS
SEL:
| Sensor Type | 0x7 Processor |
| Sensor Number | Per BMC spec design |
| Event Dir/Type | 0x6F |
| Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM value) Bit[3:0] = Error Type (PROCESSOR CONFIGURATION ERROR) |
| Event data 2 | Bit[7:2] = Reserved Bit[1:0] = 0 – QPI Warning 1 – QPI Non-Fatal Error 2 – QPI Fatal Error |
| Event data 3 | Bit[7:4] = CPU Socket Number Bit[3:0] = QPI Port number |
ExtSEL:
| Sensor Type | 0x7 Processor |
| Sensor Number | Per BMC spec design |
| Event Dir/Type | 0x70 – OEM Event |
| Event Data 1-3 | Filled by BMC |
| Extended SEL Data 1 | 0x5 - Error Type (PROCESSOR CONFIGURATION ERROR) |
| Extended SEL Data 2 | Bit[7:2] = Reserved Bit[1:0] = 0 – QPI Warning 1 – QPI Non-Fatal Error 2 – QPI Fatal Error |
| Extended SEL Data 3 | Bit[7:4] = CPU Socket Number Bit[3:0] = QPI Port number |
| Extended SEL | Bit[7:0] = Major Code based on Purley RC User Guide. |
| Data 4 | |
| Extended SEL Data 5 | Bit[7:0] = Minor Code based on Purley RC User Guide. |
1.2 MRC ERRORS
SEL:
| Sensor Type | 0xC Memory |
| Sensor Number | Per BMC spec design |
| Event Dir/Type | 0x6F |
| Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM value) Bit[3:0] = 0x7 - Error Type (MEMORY CONFIGURATION ERROR) |
| Event data 2 | Bit[7:4] = CPU Socket Number Bit[3:0] = Memory Channel number |
| Event data 3 | Bit[7:4] = DIMM slot number Bit[3:0] = DIMM Rank number |
ExtSEL:
| Sensor Type | 0xC Memory |
| Sensor Number | Per BMC spec design |
| Event Dir/Type | 0x70 – OEM Event |
| Event Data 1-3 | Filled by BMC |
| Extended SEL Data 1 | 0x7 - Error Type (MEMORY CONFIGURATION ERROR) |
| Extended SEL Data 2 | Bit[7:2] = Reserved Bit[1:0] = 0 – MRC Warning 1 – MRC Non-Fatal Error 2 – MRC Fatal Error |
| Extended SEL Data 3 | Bit[7:4] = CPU Socket Number Bit[3:0] = Memory Channel number |
| Extended SEL Data 4 | Bit[7:4] = DIMM slot number Bit[3:0] = DIMM Rank number |
| Extended SEL Data 5 | Bit[7:0] = Major Code based on Purley RC User Guide. |
| Extended SEL Data 6 | Bit[7:0] = Minor Code based on Purley RC User Guide. |
1.3 PCIE PERFORMANCE DEGRADATION
Extended SEL format:
| Sensor Type | 0x21 Slot / Connector |
| Sensor Number | Per BMC spec design |
| Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM value) Bit [3:0] = 0 (Error Type - PCIE Performance Degradation) |
| Event data 2 | Bit[7-3] = Reserved Bit[2:0] = Degradation Type BIT 0 – Link speed degraded BIT 1 – Link width degraded BIT 2 – Link training failed |
| Event data 3 | Bit[7:0] = Slot Number |
2. POST ERROR LOG WITH STANDARD SEL EVENT FORMATS
These messages are covered under the IPMI spec, but may have additional OEM data included.
2.1 MICROCODE ERRORS
| Sensor Type | 0x7 Processor Microcode |
| Sensor Number | Per BMC spec design |
| Event data 1 | Bit[7:4] = 0xF Bit[3:0] = 0x5 |
| Event data 2 | Bit[7:6] = Reserved Bit[5:0] = CPU number |
| Event data 3 | 0x2 |
2.2 BMC REQUESTED NMI
| Sensor Type | 0x13 Critical Interrupt |
| Sensor Number | Per BMC spec design |
| Event Type | 0x6f Sensor Specific Offset |
| Event data 1 | Bit[7:4] = 0x0 (Indicates that OEMEvData2 and OEMEvData3 are unspecified) Bit[3:0] = 0x03 Software SMI |
| Event data 2 | Bit [7:0] = 0 |
| Event data 3 | Bit [7:0] = 0 |
2.3 CPU EXCEPTION
| Sensor Type | 0x0F System Firmware Progress |
| Sensor Number | Per BMC spec design |
| Event Type | 0x6F |
| Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 is OEM values) Bit [3:0] = 0x1 System Firmware Hang |
| Event data 2 | Bit[7:0] = 0 unspecified |
| Event data 3 | Bit[7:0] = Exception Number |
2.4 NO BOOTABLE DEVICE FOUND
| Sensor Type | 0x1E Boot Error |
| Sensor Number | Per BMC spec design |
| Event Type | 0x6f sensor specific offset |
| Event data 1 | Bit[7:4] = 0x0 (Indicates that OEMEvData2 and OEMEvData3 are unspecified) Bit[3:0] = 0x00 No Bootable media |
| Event data 2 | Bit [7:0] = 0xFF (unspecified) |
| Event data 3 | Bit [7:0] = 0xFF (unspecified) |
2.5 CMOS CLEARED OR RTC RESET
| Record ID | Record ID |
| Record Type | 02 – System Event Record |
| Timestamp | Timestamp |
| Generator ID | 0x01 |
| EvmRev | 4 |
| Sensor Type | 0x29 Battery |
| Sensor Number | Per BMC spec design |
| Event Dir | EventType | 0x6F |
| Event data 1 | Bit[7:4] - 0x0 - Indicates byte 2 and byte3 are reserved. Bit[3:0] – 0x1 - Battery failed. |
| Event data 2 | Reserved |
| Event data 3 | Reserved |
Note: For runtime errors current BIOS supports logging both SEL and extended SEL events, as Lenovo current web utilities does not support reading the extended SEL events.
2.6 ME VERVISON MISMATCH DETECTED
| Record ID | Record ID |
| Record Type | 02 – System Event Record |
| Timestamp | Timestamp |
| Generator ID | 0x01 |
| EvmRev | 4 |
| Sensor Type | 0x2B Version Change |
| Sensor Number | Per BMC spec design |
| Event Dir | EventType | 0x6F |
| Event data 1 | Bit[7:4] - 0x0 - Indicates byte 2 and byte3 are reserved. Bit[3:0] – 0x3 - Firmware or software incompatibility detected with associated Entity. |
| Event data 2 | Reserved |
| Event data 3 | Reserved |
3. RUNTIME ERROR LOGGING AND FRU ISOLATING
3.1 MEMORY ERROR
Lenovo Correctable error Logging Policy:
1. If system encounters 160 correctable errors in a DIMM rank in 10 seconds or 2560 errors in 24 hours, BIOS will log one SEL log to BMC.
2. If system encounters 1000 correctable errors in a DIMM rank in 10 seconds, then disable the SMI of the memory controller. The memory connected to this controller will not report error until next reset.
3. Memory Corrected/Uncorrected error are in same formats.
SEL:
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 02 – System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | 0xC Memory |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Event Dir | EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type Error Type: Correctable Memory Error: 0x00 Uncorrectable Memory Error: 0x01 Parity Error: 0x02 Correctable Memory Error Logging Limit Reached: 0x05 |
| 15 | Event data 2 | Bit[0] = Current/Last Boot Error Current Boot : 0 Last Boot : 1 Bit[2:1] = Memory Controller Number |
| 16 | Event data 3 | Bit[7:6]: CPU Socket Number. Bit[5:4]: Channel Number. Bit[3:0]: DIMM Number. |
*Note: This SEL will turn on fault LED.
ExtSEL
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0xDF – OEM System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 0 |
| 11 | Sensor Type | 0xC Memory |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Event Dir | EventType | 0x70 |
| 14 | Reserved | 1Byte (modified as 0xAA by BMC) |
| 15 | Reserved | 1Byte (modified by BMC) |
| 16 | Resreved | 1Byte (modified by BMC) |
| 17 | Ext Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type Error Type: Correctable Memory Error: 0x00 Uncorrectable Memory Error: 0x01 Parity Error: 0x02 Correctable Memory Error Logging Limit Reached: 0x05 |
| 18 | Ext Event data 2 | Bit[0] = Current/Last Boot Error Current Boot : 0 Last Boot : 1 Bit[2:1] = Memory Controller Number |
| 19 | Ext Event data 3 | Bit[7:6]: CPU Socket Number. Bit[5:4]: Channel Number. Bit[3:0]: DIMM Number. |
| 20-27 | Ext Event data 4-11 | MC Bank Status Register |
| 28-35 | Ext Event data 12-19 | MC Bank Address Register |
| 36-43 | Ext Event data 20-27 | MC Bank Misc Register |
| 44 | Ext Event data 28 | MC Bank number |
3.2 AER (PCIE DEVICES)
SEL:
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 02 – System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | SEL_SENS_TYPE_CRIT_ERR <0x13> |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Event Dir | EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM |
| values) Bit[3:0] = Error Type Error Type PCI PERR - 0x04 PCI SERR - 0x05 Bus Correctable Error - 0x07 Bus Uncorrectable Error - 0x08 Bus Fatal Error - 0x0A | ||
| 15 | Event data 2 | Bit[7:0] = PCI bus number for failed device. |
| 16 | Event data 3 | Bit[7:3] = PCI device number for failed device. Bit[2:0] = PCI function number for failed device. |
ExtSEL
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0xDF – OEM System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 0 |
| 11 | Sensor Type | SEL_SENS_TYPE_CRIT_ERR <0x13> |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Event Dir | EventType | 0x70 |
| 14 | Reserved | 1Byte (modified as 0xAA by BMC) |
| 15 | Reserved | 1Byte (modified by BMC) |
| 16 | Resreved | 1Byte (modified by BMC) |
| 17 | Ext Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type Error Type PCI PERR - 0x04 PCI SERR - 0x05 Bus Correctable Error - 0x07 Bus Uncorrectable Error - 0x08 Bus Fatal Error - 0x0A |
| 18 | Ext Event data 2 | Bit[7:0] = PCI bus number for failed device. |
| 19 | Ext Event data 3 | Bit[7:3] = PCI device number for failed device. Bit[2:0] = PCI function number for failed device. |
| 20-21 | Ext Event data 4-5 | Slot Infomation(Number) |
| 22 | Ext Event data 6 | IsBridge |
| 23-24 | Ext Event data 7-8 | SecondaryStatus |
| 25-26 | Ext Event Data Byte[9-10] | DeviceStatus |
| 27-30 | Ext Event Data Byte[11-14] | UncorrErrStatus Register |
| 31-34 | Ext Event Data Byte[15-18] | CorrErrStatus Register |
| 35-38 | Ext Event Data Byte[19-22] | RootErrStatus Register |
3.3 RUNTIME PROCESSOR ERRORS
For MCA Banks IFU, DCU, DTLB and MLC Errors SEL:
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 02 – System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | 0x7 PROCESSOR_SENSOR_TYPE |
| 12 | Sensor Number | Per BMC senor number Spec Design |
| 13 | Event Dir | EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type (5-PROCESSOR CONFIGURATION_ERROR) |
| 15 | Event data 2 | Bit[7:4] = Socket Number Bit[3:0] = Bank Type (Please see below) Bank Type: 0 (0000) - None 1 (0001) - IFU 2 (0010) - DCU 3 (0011) - DTLB 4 (0100) - MLC 5 (0101) - PCU 6 (0110) - IIO 7 (0111) - CHA 8 (1000) - KTI |
| 16 | Event data 3 | Bit[7:4] = Processor Error Type (UNKNOWN/Cache/TLB/BUS/Micro Arch) Bit[3:0] = Error Severity (Correctable/Uncorrectable) Error Severity: 00 - Correctable Error 01 - Fatal Error 02 - Corrected Error |
Extended SEL
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0xDF – OEM System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 0 |
| 11 | Sensor Type | 0x7 PROCESSOR_SENSOR_TYPE |
| 12 | Sensor Number | Per BMC senor number Spec Design |
| 13 | Event Dir | EventType | 0x70 |
| 14 | Reserved | 1Byte (modified as 0xAA by BMC) |
| 15 | Reserved | 1Byte (modified by BMC) |
| 16 | Resreved | 1Byte (modified by BMC) |
| 17 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] Error Type (5-PROCESSOR = CONFIGURATION_ERROR) |
| 18 | Event data 2 | Bit[7:4] = Socket Number Bit[3:0] = Bank Type (Please see below) Bank Type: 0 (0000) - None 1 (0001) - IFU 2 (0010) - DCU 3 (0011) - DTLB 4 (0100) - MLC 5 (0101) - PCU 6 (0110) - IIO 7 (0111) - CHA 8 (1000) - KTI |
| 19 | Event data 3 | Bit[7:4] = Processor Error Type (UNKNOWN/Cache/TLB/BUS/Micro Arch) Bit[3:0] = Error Severity (Correctable/Uncorrectable) Error Severity: 00 - Correctable Error 01 - Fatal Error 02 - Corrected Error |
| 20-27 | Ext Event data 4-11 | MC Bank Status Register |
| 28-35 | Ext Event data 12-19 | MC Bank Address Register |
| 36-43 | Ext Event data 20-27 | MC Bank Misc Register |
| 44 | Ext Event data 28-29 | MC BANK number |
3.4 IIO CORE
SEL:
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0x2 –System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | 0x07 PROCESSOR_SENSOR_TYPE |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Event Dir | EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type (5-PROCESSOR CONFIGURATION_ERROR) |
| 15 | Event data 2 | Bit[7:4] = CPU Socket Number. Bit[3:0] = Reserved |
| 16 | Event data 3 | Error Sub Type c4h - Master abort address error c5h - Completor abort address error c6h - FIFO Overflow/Underflow error |
3.5 IIO-COHERENCE INTERFACE (IIO QPI)
SEL:
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0x2 –System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | 0x07 PROCESSOR_SENSOR_TYPE |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Dir | Event EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type (5-PROCESSOR CONFIGURATION_ERROR) |
| 15 | Event data 2 | Bit[3:0] = QPI Port number. Bit[7:4] = CPU Socket Number. |
| 16 | Event data 3 | Coherent Interface (IRP) Local Group Error code as per IvyBridge-EX 4S Processor External Design Specification (EDS) specification. B4h - Write Cache Detected ECC Correctable Error. C1h - Coherency Interface Protocol Layer Received Poisoned packet C2h - I/O module Write Cache uncorrectable Data ECC error C3h - I/O module CSR access crossing 32-bit boundary. D7h - Coherent Interface Protocol Layer Received Unexpected or Illegal Response/Completion DAh - Coherent Interface Protocol Layer Queue/Table Overflow or Underflow DBh - Coherent Interface Protocol Parity Error. |
3.6 IIO-VTD
SEL
| Byte | Field | Description |
| 1-2 | Record ID | Record ID |
| 3 | Record Type | 0x2 –System Event Record |
| 4-7 | Timestamp | Timestamp |
| 8-9 | Generator ID | 0x21 |
| 10 | EvmRev | 4 |
| 11 | Sensor Type | 0x07 PROCESSOR_SENSOR_TYPE |
| 12 | Sensor Number | Per BMC spec design |
| 13 | Dir | Event EventType | 0x6F |
| 14 | Event data 1 | Bit[7:4] = 0xA (Indicates that OEMEvData2 and OEMEvData3 are OEM values) Bit[3:0] = Error Type (5-PROCESSOR CONFIGURATION_ERROR) |
| 15 | Event data 2 | CPU Socket Number. |
| 16 | Event data 3 | Intel VT-d Local Group error code as per IvyBridge-EX 4S Processor External Design Specification (EDS) 90h - Data Parity Error during Context Cache Lookup 91h - Data Parity Error during L1 Lookup 92h - Data Parity Error during L2 Lookup 93h - Data Parity Error during L3 Lookup 94h - TLB0 Data Parity Error 95h - TLB1 Data Parity Error 96h - Unsuccessful completion status received in the coherent interface 97h - Illegal request to 0xFEE 98h - Protected Memory region space violated status A0h - Intel VT-d spec defined errors |
4. SYSTEM FAULT LED
When BIOS detected listed system errors, BIOS or BMC will turn on system fault LED.
- QPI RC errors.
- MRC errors.
- Microcode Errors
- CPU Exception
- Runtime Processor Errors
- Uncorrected Memory Error
- IIO Core/ IIO-Coherence interface(IIO QPI)/IIO-Vtd Error